1. Field of the Invention
The present invention generally relates to computer processing techniques and, in particular, to a system and method for enabling more efficient execution of a computer program by preloading, in response to an occurrence of a context switch, cache memory with data that is likely to be used to execute the computer program after the context switch.
2. Related Art
Instructions of a computer program are typically executed by a processing unit within a computer system. To execute the instructions, the processing unit utilizes data that may be stored in various memory locations, such as cache memory, main memory, disk memory, etc. Cache memory, as known in the art, resides close to and often on the same board as the processing unit. Therefore, data usually can be written to and retrieved from cache memory faster than from memory outside of the processing unit, such as main memory, disk memory, etc.
When the processing unit executes an instruction that writes to or reads from an address in memory, the processing unit first analyzes the cache memory to determine whether the data of the address is stored in cache memory. If this data is stored in cache memory, then the instruction can be quickly executed. In this regard, if the executing instruction is a read instruction, then the foregoing data is retrieved from cache memory. If the executing instruction is a write instruction, then the foregoing data is overwritten.
However, if the data of the address to be written to or read from is not located in the cache memory, then the processing unit issues a retrieval request to request retrieval of the foregoing data. In response to the retrieval request, a memory system manager searches for the requested data in memory outside of the processing unit. While the memory system manager is searching for the requested data, any detected instruction writing to or reading from the address of the requested data is usually stalled in the processing unit. Once the requested data has been located by the memory system manager, the requested data is retrieved and stored in a cache line of the cache memory. As known in the art, a “cache line” is a set of one or more data values stored in the cache memory. Once the requested data is stored in a cache line of the cache memory, the stalls on any of the instructions writing to or reading from the address of the requested data can usually be removed.
To enable the processing unit to determine whether data utilized by an instruction is stored in the cache memory, the cache memory usually includes mappings that are correlated with the data stored in the cache memory and that identify memory locations outside of the processing unit from which the data was originally retrieved or to which the data is ultimately stored. In this regard, when a data value is retrieved from memory outside of the processing unit and stored in the cache memory, a mapping is generated that identifies the memory location from which the data value is retrieved and that identifies the cache memory location where the data value is stored in cache memory. The mapping can later be used by the processing unit to determine whether or not the data value of a particular address is stored in cache memory.
For example, when the processing unit is executing an instruction that utilizes data stored at a particular address identifying a memory location outside of the processing unit, the processing unit can determine whether the required data is stored in cache memory by analyzing the mappings. If one of the mappings identifies the particular address, then the required data value has already been stored in the cache memory, and the processing unit, therefore, does not need to issue a retrieval request to retrieve the required data value from memory outside of the processing unit. Instead, the processing unit can retrieve the data value stored at the cache memory location identified by the foregoing mapping.
It is well known that the execution of a computer program by a processing unit can be temporarily stopped to allow the processing unit to execute instructions from another computer program. In a multitasking computer system, multiple computer programs are allowed to run in an interleaved fashion such that the multiple computer programs appear to run simultaneously to the user. To achieve this, the operating system alternates which programs are executed by the processing unit.
For example, assume that a computer system is running two computer programs in an interleaved fashion. The processing unit in the computer system initially executes instructions from one of the programs. At some point, the operating system induces a context switch, in which the processing unit stops executing instructions from the first computer program and begins to execute instructions from the second computer program. Later, the operating system induces another context switch, in which the processing unit stops executing instructions from the second computer program and begins to execute instructions from the first computer program. The execution of instructions from the two computer programs is alternated in this way until one or both of the programs terminates or until another computer program is invoked. It should be noted that any number of computer programs can share the processing unit according to the foregoing techniques.
While the processing unit is executing a program, certain information is maintained in control registers within the processing unit. Such information is commonly referred to as “the machine state.” When a computer program is context switched out (i.e., when execution of the computer program is halted in response to an occurrence of a context switch), the machine state that existed at the time of the context switch is stored to memory outside of the processing unit. When this same computer program is later context switched in (i.e., when execution of the computer program resumes in response to an occurrence of another context switch), the foregoing machine state is retrieved and loaded into the control registers so that the execution of the computer program may resume without errors.
However, when a computer program is context switched in during a context switch, the cache memory usually includes data retrieved in response to execution of instructions from the previously executed computer program (i.e., the computer program that is context switched out during the same context switch). Therefore, it is not likely that the cache memory contains data useful for the execution of the computer program that is context switched in. As a result, when instructions from this computer program are initially executed after the context switch, it is likely that numerous retrieval requests will be issued, and it is, therefore, likely that numerous stalls will occur. The stalls significantly impact the performance of the processing unit. Once a significant amount of data is stored in the cache memory in response to execution of the computer program that is context switched in, the number of retrieval requests is likely to decrease, and the number of stalls are, therefore, likely to decrease, as well.
Thus, a heretofore unaddressed need exists in the industry for providing a system and method of reducing the adverse impact of stalls that initially occur after a context switch.